1. Field of the Invention
The present invention relates to an electrically rewritable semiconductor storage device.
2. Description of the Related Art
Conventionally, LSIs are formed by integration of devices in a two-dimensional plane on the silicon substrate. Although the dimension for each device must be reduced (refined) to increase memory storage capacity, recent years are facing challenges in such refinement from the viewpoint of cost and technology. Such refinement requires further improvements in photolithography technology. However, in currently available ArF immersion lithography technology, for example, the resolution limit has been reached around the 40 mn design rule and so EUV exposure devices have to be introduced for further refinement. However, the EUV exposure devices are expensive and infeasible in view of the costs. In addition, if such refinement is accomplished, it is assumed that physical improvement limit, such as in breakdown voltage between devices, would be reached unless driving voltage can be scaled. That is, it is likely that difficulties would be encountered in device operation itself.
Therefore, various kinds of semiconductor storage devices have been proposed recently where memory cells are arranged in a three-dimensional manner to achieve improved integration of memory devices.
One of the conventional semiconductor storage devices where memory cells are arranged in a three-dimensional manner uses transistors with a cylinder-type structure (see, Japanese Patent Laid-Open No. 2007-266143, U.S. Pats. No. 5,599,724, and 5,707,885). Those semiconductor storage devices using transistors with the cylinder-type structure are provided with multiple laminated conductive layers corresponding to gate electrodes and pillar-like columnar semiconductors. Each of the columnar semiconductors serves as a channel (body) part of each of the transistors. Memory gate insulation layers that can accumulate charges are provided around the columnar semiconductors. Such a configuration including laminated conductive layers, columnar semiconductors, and memory gate insulation layers is referred to as a “memory string”.
In a semiconductor storage device with the memory strings, as in the conventional art, capacitor elements and resistor elements are indispensable. The capacitor elements are used for boosting voltage in a semiconductor storage device or used as protection elements. The resistor elements are used as voltage dividers or used for protecting elements.
Moreover, as in the memory cells, it is required to reduce the areas occupied by the capacitor elements. However, it is necessary to provide capacitor elements with large capacitance for the non-volatile semiconductor storage devices due to high voltage used in writing data, etc. This means that the capacitor elements that are used in a conventional non-volatile semiconductor storage device occupy larger areas compared to other semiconductor devices.
In addition, the resistor elements have been formed with low-resistance floating gates in planar-type transistors. Therefore, when resistor elements with high resistance are required, such floating gates are used that are elongated on the substrate surface, which could hinder the reduction in size of the semiconductor storage devices.